- #40 [whizmika], 17-07-11 09:56
- #39 [pluto2], 17-07-10 21:09Great, visit you again some other time! (^_^)
I like non delta sigma dac sound too. My favorite is from the TDA1541A chip, though only a few masters know how to make it sound right, namely Thorsten Loesch, John Brown and Pedja Rogic. - #38 [.ghost], 17-07-09 09:11pluto2 morning
部 R2R DSD DAC 聽絃樂聲效非常自然我畀 95分,整體動態開大聲絕無抄耳,大或細細聲質感表現感非常好,低頻有靭度, BACKGROUND NOISE 好靜.比你上次黎聽個部 DAC 更好. -
- #37 [pluto2], 17-07-08 23:52好玩呀!
non delta sigma dac 声底喜歡嗎?(^V^) - #36 [.ghost], 17-07-08 23:37Pluto2 HING
最近手痕 diy 部 R2R DAC. Performance OKAY - #35 [batmanamesIA], 17-06-30 18:59Thanks Pluto2 and lovebird very good information
- #34 [pluto2], 17-06-29 17:53the new 9038 chip has slave master mode... anyways...pls see pm. (^V^)
- #33 [lovebird], 17-06-29 11:25Yes... the DPLL in sabre dac is quite sophisticated but offers various locking levels for eliminating jitters. Most of the time off the self products are using minimal amount of locking without causing stability issue but sacrifice SQ. DIYer, however, could able to push to the limit of the chip...
And in fact, jitter could be induced by conditions all around such as even a clock signal passes thru couples of millimeter before reaching the dac. So, it could be good if have it handled for re-alignment within a tiny closed circuit. I have obtained a very good result and that's why I sincerely invited u for a visit. :) - #32 [pluto2], 17-06-28 22:12DPLL is asynchronus though advanced, again, and you can imagine it does take many more steps and logics to lock data in tight...and sometimes it could pop haha...wouldnt a master clock syncing the whole system be better off? Indeed it is.. many notches up in sonics for so doing.(say 9018 sync vs async)
Theoretically speaking asynchronous operation could fit in the bill, however in practice...certain amount of jitters do get produced in the loop.
(^_^)
最後修改時間: 2017-06-28 22:27:50 - #31 [Ck2007], 17-06-28 19:34用作多功能電腦為佳, 我覺得os系重點之一,我暫時覺得rapsberry pi比較好。
一來平買來專為cas, 有好os+player配套free. 如果要播視頻買多部都化算 - #30 [小仇], 17-06-28 19:02
- #29 [tmcc2006], 17-06-28 18:17聽師兄們講入門呢套幾好...剛剛收到^^
- #28 [lovebird], 17-06-28 18:10Thx for your sharing. Noticed that you're using "Direct Synchronize" to minimize jitter. I'm however, quite depending on the internal DPLL for doing the job. The drawback is that the dac chip may take some time to stabilize the locking during a different clock scale switching (44.1khz 48khz). However the result is stunning when the locking takes place.
If possible, could we pay a visit each other to illustrate more on the implementation? I hope my PC setup (running linux) will make you feeling good and both of us could benefit more. :)
最後修改時間: 2017-06-28 18:18:14 - #27 [pluto2], 17-06-28 16:40設計高性能CAS的更好方法是通過一個時鐘同步所有操作,並通過dac芯片本身指示的數據檢索順序進行後續D / A處理。
所以在post#3中以這種情況為例,9038 dac芯片是由一個自由運行的振盪器 - ndk duculon(沒有PLL,用於spdif?)的時鐘,同時對sd卡數據檢索邏輯進行計時(使用原始架構,避免產生不必要的抖動)。
因此,dac芯片本身就要get每一個bit...這是直接同步模式,不像在雙向設備通信中產生更多抖動的推斷異步操作 (asynchronus mode)。
所指出的這樣簡單數據訪問設計的一個缺點是,它不能提供花哨的圖形界面和更多用戶友好的音樂文件選擇或顯示,儘管當然可以改進(^ _ ^)。
(btw,post#3中的混亂可以放在一個單一的盒子,簡化的電源...,因為我的即將組裝)
另外,一個很好的建議是在CAS設計中為每個功能使用單獨的電池,以盡可能地更換調節器。 LiFeO2電池是一個很好的選擇。
回到USB,如果你看#20,你可能會非常驚訝地發現,USB傳輸有錯誤檢查,但沒有內置的糾錯功能.. •﹏•。
對於快速和專用的PC,這個問題可能不會像USB端口在通信協議中獲得優勢那麼突出。
無論如何,就是這個建議:
記憶卡/棒> Pi3(i2s)> PC
CFT
- #26 [pluto2], 17-06-28 16:34A better way to design a high performance CAS is to synchronize all operations by one single clock, with data retrieval sequence instructed by the dac chip itself for the subsequent D/A processing.
So take this case in post #3 as an example, the 9038 dac chip is clocked by a free running oscillator - ndk duculon (no PLL, for spdif?) and at the same time clocking the sd card data retrieval logics too (using most primitive architecture to avoid creating unnecessary jitter).
So each bit is called for by the dac chip itself...this is the direct synchronized mode, unlike the inferrior asynchronus operation which creates more jitter in the bilateral devices communication.
One drawback of such simple data access design as pointed out is that it cant afford fancy graphic interface and more user friendly music files selection or display, though can be improved of course (^_^).
(btw, that mess in post #3 can be put into one single box with simplified power supplies... as mine will be assembled soon)
In addition, a good suggestion is to use separate batteries for each function in the CAS design to replace regulators wherever possible. LiFeO2 battery is an excellent choice.
Going back to USB, if you look at post # 20 , you might be very surprised to learn that USB transmission has error checking BUT NO error correction function built in!.. •﹏•.
For fast and dedicated PCs, this issue might not be as prominent as USB ports do get the priorites in the communications protocal.
Anyway, thats why the suggestion:
memory cards/stick > Pi3 (i2s) > PC
CFT - #25 [小仇], 17-06-28 12:04無風扇的ITX電腦裝daphile +LPS
OR
raspberry + LPS
兩者有無人比較過? - #24 [lovebird], 17-06-28 11:09
一般 USB data error 都來自 signal noise 與 jitter, 所以有一些針對性嘅產品出現,一般 PC 用家宜家多咗好多 gadgets 去幫助佢地減少 PC 嘅 latency 同 noise 嘅影響, 以往由 PC 到 DAC interface 嘅 bottle neck 可以大大放寬,到下一步,又可能回到不同 DAC implementation 與用家 application 嘅配合,例如有部份人會選擇自己 upsampling,有另一部份人唔需要。 - #23 [lovebird], 17-06-28 10:38#19
用 clock multiplier 都會增加 jitter 的,不過要兼容性就無法。
No PLL? 我估你意思係用9038 default 的。 - #22 [ck2007], 17-06-27 16:09Volumio & Runeaudio 應該係同一個種
Interface 非常簡單. PC用web連線, smartphone apps其實都係.
自己經驗開始用Runeaudio一直都連唔到NAS(無設定錯),師兄建議改為Volumio,smooth.
最後修改時間: 2017-06-27 16:17:06 - #21 [ck2007], 17-06-27 16:04另外如果個media 可以 access 埋 NAS 會全面 d…
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